The Z88 has two system clocks - a low power 25.6 KHz clock active during the machine's coma state, and a 9.8304 MHz master clock active at all other times.
Referring to Figure 1.6, crystal oscillator TR18/XT1 generates the master clock, the resultant signal MCK being divided in the gate array to produce a 3.278 MHz clock for the CPU on ICI pin 6 and the LCD on SK5 pin 9. Typically, the clock consumes 2 mA and is switched off to conserve battery life by suppressing the +5.5V switched power rail (see para. 10.3.1).
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