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A special routine is running in LOWRAM that performs the update. Blink interrupts and screen is turned off during the update process because the AMD flash chip hardware is running in command mode, interacting with the routine in LOWRAM (it cannot be interrupted by the Blink during this vital stage). The routine operates without OZ (it has been erased from the chip!), reading the RAM files directly via the linked list of sectors as they were organised by OZ.
DC_Upd flashes OZ banks in slot 1 in upper half of 512K of the chip; this is the standard - OZ is always located at the top (like in application cards) in slot 1.
There's no fall-back if a partial update fails; the end-user must recover OZ manually using tools such as RomUpdate. Failures might be due to slot connector problems or simply that the chips shows signs of age.