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The logic is detailed below :
INT.UART = STA.UART = (UIT.TDRE & UMK.TDRE) | (UIT.RDRF & UMK.RDRF) | (UIT.DCDI & UMK.DCD) | (UIT.CTSI & UMK.CTS)
INT.TIME = STA.TIME = (TSTA.TICK & TMK.TICK) | (TSTA.SEC & TMK.SEC) | (TSTA.MIN & TMK.MIN)
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