Register Period Counts to Width in bits
TIM0 5ms 199 8
TIM1 1 second 59 6
TIM2 1 minute 255 8
TIM3 256 minutes 255 8
TIM4 64K minutes 31 5
The clock is reset to zero by settings RESTIM in the COM register. The clock will be held in reset, ie. it won't count until RESTIM is cleared again. In order to guarantee a valid result from any of these registers, software needs to read until two equal values are returned. This should always occur within three read cycles.
A second has passed (TIM1 is increased) when TIM0 reaches 128 ($80) - TIM0 continues to count to 199 then wraps to 0.
There are three interrupts that the real time clock can generate and these are TICK (200 times a second - 5ms), SEC (once a second) and MIN (once a minute). TSTA may be set for all three events at once, or individually (all at once means that a TICK made a new second and that second made a minute).
STA.TIME is set when TSTA.MIN or TSTA.SEC or TSTA.TICK are set according TMK mask. When all TSTA interrupts have been acknowledged, STA.TIME is reset. This logic is detailed in blink interrupt.
Three registers are associated with these interrupts:
BIT NAME Function
7 - 3 - -
2 MIN Set if minute interrupt has occurred
1 SEC Set if second interrupt has occurred
0 TICK Set if tick interrupt has occurred
BIT NAME Function
7 - 3 - -
2 MIN Set to enable minute interrupt
1 SEC Set to enable second interrupt
0 TICK Set to enable tick interrupt
BIT NAME Function
7 - 3 - -
2 MIN Set to acknowledge minute interrupt
1 SEC Set to acknowledge second interrupt
0 TICK Set to acknowledge tick interrupt