Tiny url http://tinyurl.com/jdp3qqr
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- A19 - Selects either the top half of the 1M memory space for the flash chip or the bottom half for the RAM.
- /CE - Selects the 1M card.
Truth Table of the 74139
| Inputs Enable Select | Outputs | |||
|---|---|---|---|---|
| /E /CE | A1 | A0 A19 | /Y1 /CE1 FLASH | /Y0 /CE0 RAM |
| 0 | 0 | 0 | 1 | 0 |
| 0 | 0 | 1 | 0 | 1 |
| 1 | X | X | 1 | 1 |
Logic Diagram
Original
Cut Down Version using two inputs and two outputs
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The Z88 only uses one half of this dual decode chip. This circuit may be made with
- 3 inverters
- 2 NAND gates
The inverters are slower than the NAND gates, so it was decided to use 5 NAND gates using 3 of the gates as inverters.
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Using just NAND gates requires too many of them. See http://www.neuroproductions.be/logic-lab/index.php?id=63191 for the unfinished work in getting a full chip to work.
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| Part No | Chip | Manufacture | Speed nS | Package | Price | |||
|---|---|---|---|---|---|---|---|---|
| Min | Typ | Max | ||||||
| 1741279 | SN74LVC1G139DCTR | Ti | <2.5 | SM8 | $ 0.69 | |||
| SN74LVC1G139DCUT | Ti / Farnell | <2.5 | VSSOP | £0.404 | ||||
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| Part No | Chip | Manufacture | Speed nS | Package | Price | |||
|---|---|---|---|---|---|---|---|---|
| Min | Typ | Max | ||||||
SN74LVC1G0832 | Ti | <2.5 | SOT-23 (DBV) | $ 0.69 | ||||
| SN74LVC1G139DCUT | Ti / Farnell | <2.5 | VSSOP | £0.404 | ||||
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| Inputs | Outputs | ||
|---|---|---|---|
| B /CE | A A19 | /Y1 /CE1 FLASH | /Y0 /CE0 RAM |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 1 |
| 1 | X | 1 | 1 |
Circuit Diagram
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http://tinyurl.com/h9nw253
Updated 3/10/2016
Building the circuit on a breadboard externally
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