Tiny url http://tinyurl.com/jdp3qqr
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- using the NAND gates, then if that was successful, try
- a decode chip from the same family.
- Combining a Single 3-Input Positive AND-OR Gate and a single decode chip to make a high speed 74139.
The Z88 only uses one half of the dual functionality of the full chip.
Using just NAND gates requires too many of them. However using the Single 3-Input Positive AND-OR Gate and a single decode chip allows this device to be built with four 3mm high speed chips. See http://www.neuroproductions.be/logic-lab/index.php?id=63191 for the ongoing logic in checking that the full chip will work.
Choosing a Fast NAND gate
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The Z88 only uses one half of this dual decode chip. This circuit may be made with
- 3 inverters
- 2 NAND gates
The inverters are slower than the NAND gates, so it was decided to use 5 NAND gates using 3 of the gates as inverters.
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Circuit updated 15:04 6/9/16
Can a Full 74139 chip be built?
The Z88 only uses one half of the dual functionality of the full chip.
Using just NAND gates requires too many of them. See http://www.neuroproductions.be/logic-lab/index.php?id=63191 for the unfinished work in getting a full chip to work.
Building a prototype board internally
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Part No | Chip | Manufacture | Speed nS | Package | Price | |||
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Min | Typ | Max | ||||||
1741279 | SN74LVC1G139DCTR | Ti | <2.5 | SM8 | $ 0.69 | |||
SN74LVC1G139DCUT | Ti / Farnell | <2.5 | VSSOP | £0.404 |
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Part No | Chip | Manufacture | Speed nS | Package | Price | |||
---|---|---|---|---|---|---|---|---|
Min | Typ | Max | ||||||
SN74LVC1G0832 | Ti | <2.5 | SOT-23 (DBV) | $ 0.69 | ||||
SN74LVC1G139DCUT | Ti / Farnell | <2.5 | VSSOP | £0.404 |
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Circuit Diagram using the Single 3-Input Positive AND-OR Gate and a single decode chip.
To be drawn
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