Tiny url http://tinyurl.com/jdp3qqr
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The Z88 only uses one half of this dual decode chip. This circuit may be made with
- 3 inverters
- 2 NAND gates
The inverters are slower than the NAND gates, so it was decided to use 5 NAND gates using 3 of the gates as inverters.
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Part No | Chip | Manufacture | Speed nS | Package | Price | |||
---|---|---|---|---|---|---|---|---|
Min | Typ | Max | ||||||
1741279 | SN74LVC1G139DCTR | Ti | <2.5 | SM8 | $ 0.69 | |||
SN74LVC1G139DCUT | Ti / Farnell | <2.5 | VSSOP | £0.404 |
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The Z88 only uses one half of this dual decode chip. This circuit may be made with
- 3 inverters
- 2 NAND gates
The inverters are slower than the NAND gates, so it was decided to use 5 NAND gates using 3 of the gates as inverters.
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Inputs Enable Select | Outputs | ||||||
---|---|---|---|---|---|---|---|
/CE | A | B | /Y3 | /Y2 | /Y1 | /Y0 | |
00 | 0 | 0 | 0 | 1 | 1 | 1 | 0 |
01 | 0 | 0 | 1 | 1 | 1 | 0 | 1 |
02 | 0 | 1 | 0 | 1 | 0 | 1 | 1 |
03 | 0 | 1 | 1 | 0 | 1 | 1 | 1 |
1 | X | X | 1 | 1 | 1 | 1 |
00
01
02
03
They both agree.
http://www.neuroproductions.be/logic-lab/index.php?id=64582
Circuit Diagram using 4 decode chips.
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