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Tiny url http://tinyurl.com/jdp3qqr

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The Z88 only uses one half of this dual decode chip. This circuit may be made with

  • inverters
  • 2 NAND gates

The inverters are slower than the NAND gates, so it was decided to use 5 NAND gates using 3 of the gates as inverters.

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Part NoChipManufactureSpeed nS
PackagePrice



MinTypMax


1741279

SN74LVC1G139DCTR

Ti

<2.5
SM8$ 0.69

SN74LVC1G139DCUTTi / Farnell

<2.5
VSSOP£0.404

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The Z88 only uses one half of this dual decode chip. This circuit may be made with

  • inverters
  • 2 NAND gates

The inverters are slower than the NAND gates, so it was decided to use 5 NAND gates using 3 of the gates as inverters.

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Inputs Enable SelectOutputs

/CEAB/Y3/Y2/Y1
/Y0
000001110
010011101
020101011
030110111

1XX1111

00

01

02

03

They both agree.

http://www.neuroproductions.be/logic-lab/index.php?id=64582


Circuit Diagram using 4 decode chips.

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