Tiny url http://tinyurl.com/jdp3qqr
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Looking through the datasheets for NAND gates found the following timings:-
| Part No | Chip | Manufacture | Speed | Package | Price | ||||
|---|---|---|---|---|---|---|---|---|---|
| Min | Typ | Max | |||||||
| 1085297 | 74HCT00D | NXP | 10nS | SOIC | 0.221 | ||||
| 381755 | 74HCT00N | NXP | 10nS | DIP | 0.667 | ||||
| 9590889 | 74HC00 | Ti | 8nS | DIP | 0.31 | ||||
| 1105915 | SN74AHCIG00 | Ti | 5,2 | 8 mA | SOT-23-5 | 1.78 | |||
| 1287697 | SN74LVCIG007 SN74LVC1G00DBVR | Ti | 4.0 | 32mA | SOT-23-5 | 1.98 | |||
| SN74LVC1G00-EP | Ti | 1.0 | 4.0 | ||||||
| SN74LVC1G00DBVR | Ti | 1.0 | 4.0 | SOT-23-5 | |||||
The Single 2-input Positive NAND gates display the fastest times.
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Full Data Sheet for SN74LVC1G00 Single 2-Input Positive-NAND Gate & Timing
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Circuit Description
There are 2 inputs,
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The Z88 only uses one half of this dual decode chip. This circuit may be made with
- 3 inverters
- 2 NAND gates
The inverters are slower than the NAND gates, so it was decided to use 5 NAND gates using 3 of the gates as inverters.
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The logic was checked with thanks to http://www.neuroproductions.be/logic-lab/ for the simulator.
| Inputs Enable Select | Outputs | |||
|---|---|---|---|---|
| /E /CE | A0 A19 | /Y1 /CE1 FLASH | /Y0 /CE0 RAM | |
| 00 | 0 | 0 | 1 | 0 |
| 01 | 0 | 1 | 0 | 1 |
| 02 | 1 | 0 | 1 | 1 |
| 03 | 1 | 1 | 1 | 1 |
00
| 01
|
02
| 03
|
They both agree.
Circuit Diagram
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Building the circuit on a breadboard externally
Components required
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10 sot to IC adaptors were obtained in addition to the 5 NAND gates.
The circuit could now be bread-boarded and tested outside the Z88 card case.
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| Note | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
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The names of the signals on the scope are not all the same as shown in the circuit.
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Printed Circuit Board
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Looking through the data sheets for a Texas Instruments VC1 chip found the following timings:-
| Part No | Chip | Manufacture | Speed nS | Package | Price | |||
|---|---|---|---|---|---|---|---|---|
| Min | Typ | Max | ||||||
| 1741279 | SN74LVC1G139DCTR | Ti | <2.5 | SM8 | $ 0.69 | |||
| SN74LVC1G139DCUT | Ti / Farnell | <2.5 | VSSOP | £0.404 | ||||
The 2-to-4 Line Decoder display fast times.
Here is the chip that has been chosen:-
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Full Data Sheet for SN74LVC1G139 2-to-4 Line Decoder & Timing
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This chip on its own provides the logic for the Z88 application.
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Truth Table of Decode Chip
| Inputs | Outputs | ||
|---|---|---|---|
| B /CE | A A19 | /Y1 /CE1 FLASH | /Y0 /CE0 RAM |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 1 |
| 1 | X | 1 | 1 |
Circuit Diagram using 2-to-4 Line Decoder
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Building the circuit on a breadboard externally
Components required
|
|
2 MSOP-8 AND 1 VSOP to IC adaptors were obtained in addition to the 5 2-to-4 Line Decoder chips.
This circuit could now be bread-boarded and tested outside the Z88 card case.
...
Looking through the data sheets for a Texas Instruments VC1 chip found the following timings:-
| Part No | Chip | Manufacture | Speed nS | Package | Price | |||
|---|---|---|---|---|---|---|---|---|
| Min | Typ | Max | ||||||
| 1741279 | SN74LVC2G32QDCURQ1 | Ti | <2.5 | SM8 | $ 0.55 | |||
| SN74LVC1G139DCUT | Ti / Farnell | <2.5 | VSSOP | £0.404 | ||||
The 2-to-4 Line Decoder display fast times.
Here is the chip that has been chosen:-
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Full Data Sheet for SN74LVC2G32-Q1 DUAL TWO-INPUT POSITIVE-OR GATE & Timing
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This chip provides the logic for the /CE signal.
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The logic was checked against the Simplified Schematic with thanks to http://www.neuroproductions.be/logic-lab/ for the simulator.
| Inputs Enable Select | Outputs | ||||||
|---|---|---|---|---|---|---|---|
| /CE | A | B | /Y3 | /Y2 | /Y1 | /Y0 | |
| 00 | 0 | 0 | 0 | 1 | 1 | 1 | 0 |
| 01 | 0 | 0 | 1 | 1 | 1 | 0 | 1 |
| 02 | 0 | 1 | 0 | 1 | 0 | 1 | 1 |
| 03 | 0 | 1 | 1 | 0 | 1 | 1 | 1 |
| 1 | X | X | 1 | 1 | 1 | 1 | |
| /CE = 0 | /CE = 1 | |
|---|---|---|
00 |
|
|
01 |
|
|
02 |
|
|
03 |
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The eight combinations all agree.
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Building the circuit on a breadboard externally
Components required
|
|
|
|
2 MSOP-8 AND 1 VSOP to 8 IC adaptors were obtained in addition to the 5 2-to-4 Line Decoder chipsDUAL TWO-INPUT POSITIVE-OR GATE chips.
This circuit could now be bread-boarded and tested outside the Z88 card case.
This photo needs to be replaced
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| Note | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ||||||||||||
The names of the signals on the scope are not all the same as shown in the circuit.
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Printed Circuit Board
(this needs to be done.)
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