Tiny url http://tinyurl.com/jdp3qqr
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The Z88 only uses one half of this dual decode chip. This circuit may be made with
- 3 inverters
- 2 NAND gates
The inverters are slower than the NAND gates, so it was decided to use 5 NAND gates using 3 of the gates as inverters.
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| Part No | Chip | Manufacture | Speed nS | Package | Price | |||
|---|---|---|---|---|---|---|---|---|
| Min | Typ | Max | ||||||
| 1741279 | SN74LVC1G139DCTR | Ti | <2.5 | SM8 | $ 0.69 | |||
| SN74LVC1G139DCUT | Ti / Farnell | <2.5 | VSSOP | £0.404 | ||||
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The decoder chip above works. It replaces 1/4 of the 74139 for the Z88 design.
Choosing the DUAL TWO-INPUT POSITIVE-OR GATE chip
Looking through the data sheets for a Texas Instruments VC1 chip found the following timings:-
| Part No | Chip | Manufacture | Speed nS | Package | Price | |||
|---|---|---|---|---|---|---|---|---|
| Min | Typ | Max | ||||||
| 1741279 | SN74LVC2G32QDCURQ1 | Ti | <2.5 | SM8 | $ 0.55 | |||
| SN74LVC1G139DCUT | Ti / Farnell | <2.5 | VSSOP | £0.404 | ||||
The 2-to-4 Line Decoder display fast times.
Here is the chip that has been chosen:-
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Full Data Sheet for SN74LVC2G32-Q1 DUAL TWO-INPUT POSITIVE-OR GATE & Timing
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This chip provides the logic for the /CE signal.
Circuit Description
There are 2 inputs A and B. The /CE signal enables the chip.
Logic Lab Test v Truth Table
The logic was checked against the Simplified Schematic with thanks to http://www.neuroproductions.be/logic-lab/ for the simulator.
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Circuit Diagram using a 2-to-4 Line Decoder and 2 Dual OR Chips.
2-to-4 Line Decoder
Updated 17/11/2016
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To be drawn
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All the components required cannot be fitted on a single card. The design has been split onto two cards. The first PCB is just for the Z88.
2-to-4 Line Decoder and 2 Dual OR Chips
If a full 74139 chip is required another PCB with the extra components can be either
- piggy backed (using the DIL connections) to this card if the 16 Pin SOIC footprint is required or
- plugged into a 16 pin DIL socket.
Building the circuit on a breadboard externally
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The names of the signals on the scope are not all the same as shown in the circuit.
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Printed Circuit Board
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2-to-4 Line Decoder
Main points
- A letterbox slot has been made Small holes are drilled in the centre of the HD1, HD2, (which are connected both sides,) so that either direct soldering or pads of H1,so that wire links may be used to connect the signals from the 512K/512K card to the PCB.
- The pads of the footprint of the SOT-23-5 have been made longer, to enable easier soldering of the small parts.
- The bottom Left Hand corner of the PCB matches the shape of the 512K/512K Card for easy alignment.C2 on the 512K/512K, needs to be removed and put onto the PCB, in the same space. This is to make the PCB a bit larger for stability.
Provisional Layout
The 7 layers
Here are the layers printed on A4 sheets. The board is small, zooming in is generally helpful.
(updated 19:16 07/09/2016)To be done
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