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Info | ||
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This section is currently being changed and re-written. It is very nearly finished. |
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The Z88 Flash/RAM card has been working for several years now. When OZ 4.6 was introduced, allowing applications to be run in RAM, some games failed to run.
Standard Version | RAM Version | Modified Monitoring FLASH Version |
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This was thought to be due to an intermittent timing error from the decode chip CD74HCT139 which switches between the RAM and Flash chip but after the Z88 Hardware Investigation, it has been discovered to be a misunderstanding by both the hardware and software engineers on how to write faultlessly to the flash chip. This has only affected a few users, i.e. those who play games in RAM or who do repetitive writing to the flash card. The majority of users have not reported any problems.
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256K OTP EPROM, 768K FLASH or RAM
CE | A19 | A18 | |
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256K OTP EPROM | 0 | 1 | 1 |
768K FLASH or RAM | 0 | 1 | 0 |
768K FLASH or RAM | 0 | 0 | 1 |
768K FLASH or RAM | 0 | 0 | 0 |
NOT SELECTED | 1 | X | X. |
Decoder Connections
The decode chip used, is repeated twice in the same device. The first part does the 256K chip select decodes the 256K EPROM with SE1, A19 and A18. The unused decode is then used to decode the remainder of the space, either the RAM or FLASH.
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Edge Con | Decoder | Signal | OTP EPROM | 1M RAM | 1M Flash | ||
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30 | 1 | SE1x | EXISTING CONNECTION | ||||
38 | 2 | A19 | xEXISTING CONNECTION | ||||
37 | 3 | A18 | x|||||
7 | 14 | OTP CE | 22 | RH 512K LK | RH 512K LKx | ||
11 | RAM CE | RH RAM LK | X | ||||
11 | FLASH CE | LH RAM LK |
256K OTP EPROM 768 RAM Modifications
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Pin | Pin | Pin | Pin | Pin | Instruction | |
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U4 | 3 | 4 | 5 | 14 | 15 | Lift up pins DO NOT CONNECT TO PCB |
U4 | 3 | A18 - Connect to pad near 1 U1 | ||||
U4 | 7 | 14 | Connect to RH pad of 512K | |||
U4 | 11 | Connect to RH pad of RAM | ||||
U3 | Fit socket for OTP EPROM | |||||
U3 | 1 | Cut track (A18) | ||||
U3 | 1 | Connect to Vpp Edge connector Pin 19 |
256K OTP EPROM 768 FLASH Modifications
Pin | Pin | Pin | Pin | Pin | Instruction | |
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U4 | 3 | 4 | 5 | 14 | 15 | Lift up pins DO NOT CONNECT TO PCB |
U4 | 3 | A18 - Connect to pad near 1 U1 | ||||
U4 | 7 | 14 | Connect to RH pad of 512K | |||
U4 | 11 | Connect to LH pad of RAM | ||||
LK1 - LK2 | Cut track between LH pad of 512 and LH pad of RAM | |||||
U3 | Fit socket for OTP EPROM | |||||
U3 | 1 | Cut track (A18) | ||||
U3 | 1 | Connect to Vpp Edge connector Pin 19 |
Conclusion
Further testing will be done before reporting that a hardware solution has been found.
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