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The modified 512K/512K card has already been used with the modified extender card as described in the Z88 Hardware Investigation section, to test how the decoder chip may be used with different address maps. It was decided just to build a card using the knowledge gained from these previous tests.
Decoder Details
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The same decoding algorithm is used for both cards. The output is either connected to the CE of the RAM or FLASH chip.
256K OTP EPROM, 768K FLASH or RAM
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The decode chip used, is repeated twice in the same device. The first part does the 256K chip select device decodes the 256K EPROM with SE1, A19 and A18. The unused decode decoder is then used to decode select the remainder of the address space, when the card is selected but not the 256K EPROM. The output going to either the RAM or FLASH chip enable.
Selecting the decoder outputs
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The output for the RAM or Flash is Y1 (Pin 11).
U3 Variants
U3 is currently wired up for a 512K Flash chip. There are 3 signals that use 2 different pins on the PLCC footprint.
These are displayed in the following table.
Connecting the OTP EPROM
If links are to be used on a future designed board the following layout maybe considered
From edge connector | Vpp (19) | A18 (37) | /PGM (22) | ||
---|---|---|---|---|---|
To U3 PLCC Footprint | Pin 1 | Pin 31 | |||
512K PROM | |||||
256K PROM | |||||
512k FLASH |
The 256K PROM is being used
Vpp needs to be connected to pin 1
PGM is already connected to pin 31
PCB Modifications
Connection Chart
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256K OTP EPROM 768 RAM Modifications
Pin | Pin | Pin | Pin | Pin | InstructionInstructions | |||
---|---|---|---|---|---|---|---|---|
Reinstate POE/ROE mods they are no longer needed. | ||||||||
U4 | 3 | 4 | 5 | 14 | 15 | Lift up pins DO NOT CONNECT TO PCB | ||
U4 | 1 | 2 | 6-8 | 9-13 | 16 | Solder chip to board using the remaining pins | ||
U4 | 3 | A18 - Connect to pad wire from Pin 3 | ||||||
U1 | to via near 1 U1 | |||||||
U4 | 7 | 14 | Connect wire from Pin 7, 14 to RH pad of 512K | |||||
U4 | 11 | Connect to RH pad of RAM NOTE: This is for the RAM. | ||||||
U3 | Fit socket for OTP EPROMU3 | |||||||
U3 | 1 | Cut track (A18) | ||||||
U3 | 1 | Connect to Vpp Edge connector Pin 19 | ||||||
LK1 - LK2 |
256K OTP EPROM 768 FLASH Modifications
Pin | Pin | Pin | Pin | Pin | InstructionInstructions | ||
---|---|---|---|---|---|---|---|
Reinstate POE/ROE mods they are no longer needed. | |||||||
U4 | 3 | 4 | 5 | 14 | 15 | Lift up pins DO NOT CONNECT TO PCB | |
U4 | 1 | 2 | 6-8 | 9-13 | 16 | Solder chip to board using the remaining pins | |
U4 | 3 | A18 - Connect to pad wire to | |||||
U1 | via near 1 U1 | ||||||
U4 | 7 | 14 | Connect to RH pad of 512K | ||||
U4 | 11 | Connect to LH pad of RAM | |||||
LK1 - LK2 | Cut track between LH pad of 512 and LH pad of RAM | ||||||
U3 | Fit socket for OTP EPROMU3 | ||||||
U3 | 1 | Cut track (A18) | |||||
U3 | 1 | Connect to Vpp Edge connector Pin 19 |
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