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The Z88 Flash/RAM card has been working for several years now. When OZ 4.6 was introduced, allowing applications to be run in RAM, some games failed to run.

Standard VersionDecoder and PROM socketRAM VersionFLASH Version

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This was thought to be due to an intermittent timing error from the decode chip CD74HCT139 which switches between the RAM and Flash chip but after the Z88 Hardware Investigation, it has been discovered to be a misunderstanding by both the hardware and software engineers on how to write faultlessly to the flash chip. This has only affected a few users, i.e. those who play games in RAM or who do repetitive writing to the flash card. The majority of users have not reported any problems.

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The modified 512K/512K card has already been used with the modified extender card as described in the Z88 Hardware Investigation section, to test how the decoder chip may be used with different address maps. It was decided just to build a card using the knowledge gained from these previous tests.

Decoder Details

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The same decoding algorithm is used for both cards. The output is either connected to the CE of the RAM or FLASH chip.

256K OTP EPROM, 768K FLASH or RAM


CEA19A18
256K OTP EPROM011
768K FLASH or RAM010
768K FLASH or RAM001
768K FLASH or RAM000
NOT SELECTED1XX.

Decoder Connections

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The decode chip used, is repeated twice in the same device. The first part does the 256K chip select device decodes the 256K EPROM with SE1, A19 and A18. The unused decode decoder is then used to decode select the remainder of the address space, when the card is selected but not the 256K EPROM. The output going to either the RAM or FLASH chip enable.

Selecting the decoder outputs

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The output for the RAM or Flash is Y1 (Pin 11).

Connecting the OTP EPROM

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U3 Variants

U3 is currently wired up for a 512K Flash chip. There are 3 signals that use 2 different pins on the PLCC footprint.

These are displayed in the following table.

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If links are to be used on a future designed board the following layout maybe considered

From edge connectorVpp (19)
A18 (37)
/PGM (22)
To U3 PLCC Footprint
Pin 1
Pin 31
512K PROM




256K PROM




512k FLASH




The 256K PROM is being used 
Vpp needs to be connected to pin 1
PGM is already connected to pin 31

PCB Modifications

Connection Chart

Edge ConDecoderSignalOTP EPROM1M RAM1M Flash
301
SE1EXISTING CONNECTION
382
A19EXISTING CONNECTION
373
A18



714OTP CE22RH 512K LKRH 512K LK


11RAM CE
RH RAM LK


11FLASH CE

LH RAM LK

256K OTP EPROM 768 RAM Modifications follows

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Step

PinPinPinPinPinInstructionInstructions








Reinstate POE/ROE mods
they are no longer needed.
1

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U43451415Lift up pins
DO NOT CONNECT TO PCB
2

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U4126-89-1316Solder chip to board
using the remaining pins
3a

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U43



A18 - Connect to pad near 1 U1wire
from U4 Pin 3
to (See step 3b)
3b

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U1




to a via near U1.
(Above the d in 'used'
and to the RH side of
the figure 1).

4

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U47

14
Connect wire from
Pin 7, 14 to RH pad of 512K
5

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U4


11

Connect to RH pad of RAM

NOTE: This is for the RAM.
It is the only difference
between the RAM
and FLASH card

6

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U3




Fit socket for

OTP EPROM

U3

Lift off Pin 1


Cut track (A18)

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U31



Connect to Vpp
Edge connector Pin 19


LK1 - LK2





256K OTP EPROM 768 FLASH Modifications follow


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Instruction
Step

PinPinPinPinPinInstructions








Reinstate POE/ROE mods they are no longer needed.
1

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U43451415Lift up pins DO NOT CONNECT TO PCB
2

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U4126-89-1316Solder chip to board using the remaining pins
3a

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U43



A18 - Connect

to pad near 1 U1

wire
from U4 Pin 3
to (See step 3b)

3b

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U1




to a via near U1. (Above the d in 'used' and to the RH side of the figure 1).
4

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U47

14
Connect to RH pad of 512K
5

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U4


11
Connect to LH pad of RAM
6

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LK1 - LK2




Cut track between LH pad of 512 and LH pad of RAM
7

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U3




Fit socket for

OTP EPROM

U3

1Cut track (A18)

DO NOT connect Pin 1 (Bottom row middle pin) to the PCB. Lift off the pin to connect the wire at the next step.

8

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U31



Connect wire from the lifted off Pin 1 U3, to Vpp Edge connector Pin 19

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