Introduction
Some games that run in RAM, particularly when in combination with OZ v4.6 and later - running in slot 1, fails to run on the 512K/512K Flash/RAM Card due to a timing error which is introduced by the decode chip CD74HCT139. This is one of the fastest decode chips but it is too slow for our purposes.
The object of this exercise is to see if by redefining the design, a faster decode is achieved.
Tiny url http://tinyurl.com/jdp3qqr
Truth Table
Inputs Enable Select | Outputs | |||
---|---|---|---|---|
/E /CE | A1 | A0 A19 | /Y1 /CE1 FLASH | /Y0 /CE0 RAM |
0 | 0 | 0 | 1 | 0 |
0 | 0 | 1 | 0 | 1 |
1 | X | X | 1 | 1 |
Logic Diagram
Original
Cut Down Version
Logic Lab Test v Truth Table
With thanks to http://www.neuroproductions.be/logic-lab/ for the simulator.
Inputs Enable Select | Outputs | |||
---|---|---|---|---|
/E /CE | A0 A19 | /Y1 /CE1 FLASH | /Y0 /CE0 RAM | |
00 | 0 | 0 | 1 | 0 |
01 | 0 | 1 | 0 | 1 |
02 | 1 | 0 | 1 | 1 |
03 | 1 | 1 | 1 | 1 |
00
01
02
03
They both agree.
Circuit Diagram
Timings
Trawling through the datasheets for NAND gates found the following:-
Part No | Chip | Manufacture | Speed | Package | Price | ||||
---|---|---|---|---|---|---|---|---|---|
Min | Typ | Max | |||||||
1085297 | 74HCT00D | NXP | 10nS | SOIC | 0.221 | ||||
381755 | 74HCT00N | NXP | 10nS | DIP | 0.667 | ||||
9590889 | 74HC00 | Ti | 8nS | DIP | 0.31 | ||||
1105915 | SN74AHCIG00 | Ti | 5,2 | 8 mA | SOT-23-5 | 1.78 | |||
1287697 | SN74LVCIG007 SN74LVC1G00DBVR | Ti | 4.0 | 32mA | SOT-23-5 | 1.98 | |||
SN74LVC1G00-EP | Ti | 1.0 | 4.0 |
The individual NAND gates are displaying the fastest times. Here is an example:-
Extra components required
Component | Manufacturer Part No | Order Code | Price | Min Qty |
---|---|---|---|---|
N95BT | Maplin | 4.09 | 1 | |
YA29G | Maplin | 1.79 | 1 | |
MFR3 2K2 FC | 1565301 | £0.085 | 10 |