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Comment: Final Layout of PCB awaiting approval

Using 5 NAND Gates to prove that there is a hardware problem was very useful, but for a production run using a single chip to replace these is the next step.

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Part NoChipManufactureSpeed nS
PackagePrice



MinTypMax


1741279

SN74LVC1G139DCTR

Ti

<2.5
SM8$ 0.69

SN74LVC1G139DCUTTi / Farnell

<2.5
VSSOP£0.404

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Signals not the same abbreviations as the circuit

The names of the signals on the scope are not all the same as shown in the circuit.



A19A19A19
/CE1_CE1/CE1
/CE0_CE/CE0


Printed Circuit Board

2-to-4 Line Decoder

Main points

  • Small holes 0.47 mm are drilled in the centre of the pads of H1,so that wire links may be used to connect the signals from the 512K/512K card to the PCB.
  • The pads of the footprint of the SOT-23-5 have been made longer, to enable easier soldering of the small parts.
  • The bottom Left Hand corner of the PCB matches the shape of the 512K/512K Card for easy alignment.

Provisional Layout

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Final Layout?

Image Added

Layout with SO 16 overlaid showing that the holes line up with pads

Image Added

Layout over the original PCB

Image Added

The 7 layers

Here are the layers printed on A4 sheets. The board is small, zooming in is generally helpful.

View file
name20161122fTurbo Decoder Z88 Card.
To be done
pdf
height250