Introduction

The Z88 Flash/RAM card has been working for several years now. When OZ 4.6 was introduced, allowing applications to be run in RAM, some games failed to run.

This was thought to be due to an intermittent timing error from the decode chip CD74HCT139 which switches between the RAM and Flash chip but after the Z88 Hardware Investigation, it has  has been discovered to be a misunderstanding by both the hardware and software engineers on how to write faultlessly to the flash chip. This has only affected a few users, i.e. those who play games in RAM or who do repetitive writing to the flash card. The majority of users have not reported any problems. 

Object

Although the best solution would be a software upgrade to OZ 4.7 allowing users to update their cards, it has been decided to see if by changing the hardware the same result may be achieved. See Writing to Flash Chips for a full explanation of what needs to be fixed. NOTE: This needs to be updated with the results found here.

The object of this exercise is to see if by redefining the address map and by hardware prevent this prevents the flash chip from writing to the data bus when it is running OZ 4.7.

It has already been proved that if OZ 4.7 is run in a 256K EPROM card, the application runs faultlessly. This is because the code that the flash chip normally writes to the data bus is no longer written, as there is no flash chip.

Although using an EPROM was considered, the Flash chip is ignored by the EPROM. There are several ways of achieving the same effect by changing the address mapping in the 1M space available on the card.Protect Flash version was tried first. This worked allowing the EPROM versions to be discarded.

Method

The modified 512K/512K card was used with the modified extender card as described in the Z88 Hardware Investigation section.

Decoder Tests

The decode circuits (one chip 74139) were built on a breadboard externally using DIL instead of using the SMD used on the card for easier testing, with flying wires to connect signals to the card and oscilloscope.

Decoder Connections

The decode chip used, is repeated twice in the same device. The first part does the 512K/512K Decode chip select decode between the RAM and FLASH (as before) whilst the . The unused part decode is used for the changesthe ROE and ROE_S the additional circuitry.

In all cases, the input pins of the unused part (Pins 13, 14 & 15), need to be isolated as they have been connected to GND.

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Protect Flash

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256K EPROM 768 FLASH PROTECTED, 256K FLASH & 512 RAM

	CE	A19	A18

256K EPROM011768K RAM0

ROES
256K FLASH PROTECTED	X	1	1	1
256K FLASH	1	1	0	ROE
512K RAM	0	0

Initially it was decided to protect the top 256K of the Flash chip, where OZ 4.7 is, but it was found that if that area was protected, the Z88 would only see 256K of Flash with no File Area.

Choosing the output

Using the signal that we wish to control as the Enable signal, choosing which out put is used is determined by A0 and A1. In this case they are both high, which means that Y3 is used.

• ROE to E (Pin 15)
• Vcc to A0 (Pin 14) for A19 high
• Vcc to A1 (Pin 13) for logic 1

The output was Y3 (Pin 9). It passed through the signal. The other 3 were high. Connecting MA19 and Vcc afterwards, the card worked perfectly.

This procedure was repeated for

• ROE to E (Pin 15)
• Vcc to A0 (Pin 14) for A19 high
• GND to A1 (Pin 13) for logic 0

The output was Y1 (Pin 11).

This was the final result as it would allow the Enable signal from the Z88 to be gated into the logic as well.

512K FLASH PROTECTED & 512 RAM

Connection List 512K

Replace Flash with EPROM 2

512K EPROM 512 RAM

NO CHANGE TO DECODE CHIP

Protect Flash

256K FLASH PROTECTED, 256K FLASH & 512 RAM

Connection List 1M

NAND Gate Build

Building the circuit on a breadboard externally

5 NAND gates were used to test whether a faster time could be achieved with the Z88.

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Results

The latest software was tried again in a standard 512K/512K Flash/RAM Card and Vic could not make the games software go wrong. The prototype board was packed and sent to Mr T who had a failing Z88 and 512K/512K Flash/RAM Card. He confirmed that it was the decoder chip that was causing the fault and suggested that another decoder could be found.

DECODER Chip Build

http://tinyurl.com/j6zkfaj

Building the circuit on a breadboard externally

Using 5 NAND Gates to prove that there is a hardware problem was very useful, but for a production run using a single 2-to-4 Line Decoder chip to replace them is the next step.
This circuit could now be bread-boarded and tested outside the Z88 card case again.

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The four signal and power lines can be seen connecting the card to the breadboard.

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Results

The Games played without crashing. The PCB could now be designed.

Z88 Turbo Card produced

It has been proved that the decode chip in the Z88 Flash/RAM card is too slow. Existing users who wish to run applications in RAM will need their cards modified with the chip being replaced with this card.

Full 74xx139 Version Build Concept

A new opportunity or a waste of time?

The decoder chip above works. It changes the timing from 10 to 3nS and replaces 1/4 of the 74139 in the Z88 design. Is there a demand for a full 74xx139 replacement card?

For the full version, adding 2 OR, dual logic gates to the outputs adds the /CE signal to the design. The challenge is to

• fit 6 chips into a 16 pin DIL footprint
• establish whether there is a demand

SMD or DIL Footprint?

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Using the Z88 Turbo Card fitting pins or wires to connect the 74xx139 Card piggybacked both footprints may be accommodated. This has proved to be impractical. Another design needs to be considered if required perhaps using a slot across the middle to connect the SO16 footprint to the card.

Build 74xx139 on a 16 pin DIL footprint

This should be possible, 3 chips on each side of the PCB with 2 rows of 8 pins on either side.

Demand or not?

Once the PCB design has been completed, it can be costed and this concept can be floated.

A decision may be made then whether to proceed with manufacture the PCB or not. It could be used in legacy equipment to see if it improved the performance. There could also be different options.

• card only
• card and components (to build)
• fully built

It will definitely not be able to compete on price, as it will cost more than 10p.

Building the circuit on a breadboard externally

Needs to be done

A test needs to be done to test the functionality of the NAND gate using the /CE signal.

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The four signal and power lines can be seen connecting the card to the breadboard.

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Results

The results need to be reported.

Printed Circuit Board

74xx139 DIL Card

To be done

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There are two functions for this card.

• The DIL 16 pads have holes through them allowing wires to be soldered to DIL 16 pads on another card.
• When used with the Z88 Flash/RAM card, it can be used with a SO 16 footprint. 16 pins or wires need to be soldered so that the DIL chip or converter card can be piggy backed on top with 2 off SIL sockets.

74xx139 to be produced or not

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Conclusion

Further testing will be done before reporting that a hardware solution has been found.

What has changed?

1. The chip select of the decoder remains unchanged.
   This selects the RAM Chip Enable when A19 is low and the FLASH Chip Enable when A19 is high.
2. The FLASH chip only uses its Chip Enable when it is read, like a ROM.
   The second independent part of the decoder does a similar function to the FLASH chip like the first, by only enabling its Output Enable signal with ROE, when A19 is high and Card Enable is low. This means that when the on board RAM is accessed, or the card is no longer enabled, the FLASH chip is no longer able to write to the data bus.
3. The extra circuitry does in effect the same thing as the chip enable, but gates the Output Enable signal. This prevents the flash chip from writing to the data bus when it is not selected.

POE & ROE

Splitting these two signals on the 512K/512K Flash/RAM card has made no difference. There are more cycles generated on the POE signal to refresh the RAM, but it was found that even Cambridge are using the ROE signal for their RAMs so it is proposed to leave ROE to Output Enable the FLASH and RAM as before.

Modifying Flash Cards

Some flash chips are better than others. What has been found is that it is possible to crash the Z88 consistently with one flash card and not with another one. It does not matter which size they are either. This is why not all users have experienced errors. It also depends what the user does. Just using Pipedream and saving files will not cause any errors.

New cards will be modified with these changes.

https://tinyurl.com/mkdlwv4

512K Flash Modifications

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1M Flash Modifications

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