Two functions of this card.
SO 16 to 16 pin DIL convertor
H1 contains the footprint of the SO 16 with small holes allowing wires to connect to the pads on the main PCB.
H2 is the footprint of a 16 pin DIL. These are connected together allowing the card to be used as a convertor. The 16 pin DIL device being piggybacked on top of this card.
Connecting and Decoding the 512K/512K Flash/RAM Card
Using 5 NAND Gates to prove that there is a hardware problem was very useful, but for a production run using a single chip to replace these is the next step. This card is to replace the SO 16 74HC139 chip. This chip is removed (with C2) and this card connects to the SO 16 footprint.
Choosing a Decoder chip
Looking through the data sheets for a Texas Instruments VC1 chip found the following timings:-
| Part No | Chip | Manufacture | Speed nS | Package | Drawing | mm | Price | |||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Min | Typ | Max | Pad Pitch | Pad width | Length | |||||||
| 1741279 | SN74LVC1G139DCTR | Ti | <2.5 | SM8 | DCT | 0.65 | 0.3 | 4.25 | $ 0.69 | |||
| SN74LVC1G139DCUT | Ti / Farnell | <2.5 | VSSOP | DCU | 0.50 | 0.25 | 3,20 | £0.403 | ||||
The 2-to-4 Line Decoder display fast times.
Here is the chip that has been chosen:-
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Full Data Sheet for SN74LVC1G139 2-to-4 Line Decoder & Timing
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This chip on its own provides the logic for the Z88 application.
There are 2 inputs,
- A19 - Selects either the top half of the 1M memory space for the flash chip or the bottom half for the RAM using the A input.
- /CE - Selects this chip.
Truth Table of Decode Chip
| Inputs | Outputs | ||
|---|---|---|---|
| B /CE | A A19 | /Y1 /CE1 FLASH | /Y0 /CE0 RAM |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 1 |
| 1 | X | 1 | 1 |
Circuit Diagram using 2-to-4 Line Decoder
Updated 17/11/2016
Building the circuit on a breadboard externally
Components required
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2 MSOP-8 AND 1 VSOP to IC adaptors were obtained in addition to the 5 2-to-4 Line Decoder chips.
This circuit could now be bread-boarded and tested outside the Z88 card case.
The four signal and power lines can be seen connecting the card to the breadboard.
The Games play without crashing.
Oscilloscope Readings
This produced the signals required.
This trace shows the Flash chip being selected (/CE1) in 3nS.
The RAM (/CE) would be the same timings.
Signals not the same abbreviations as the circuit
The names of the signals on the scope are not all the same as shown in the circuit.
| Signal | Scope | Circuit |
|---|---|---|
| A19 | A19 | A19 |
| /CE1 | _CE1 | /CE1 |
| /CE0 | _CE | /CE0 |
Printed Circuit Board
Main points
- Small holes 0.47 mm are drilled in the centre of the pads of H1,so that wire links may be used to connect the signals from the 512K/512K card to the PCB.
- The pads of the footprint of the SOT-23-5 have been made longer, to enable easier soldering of the small parts.
- The bottom Left Hand corner of the PCB matches the shape of the 512K/512K Card for easy alignment.
Final Layout
Boards ordered 24/11/16. ETA 1/12/16
The one pixel blue line for the board size is difficult to see.
| Size of board 23.11 x x15 mm | Layout with SO 16 footprint overlaid |
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| The final layout. | Holes line up with the pads that need to be soldered |
| The 7 layers | Layout over the original PCB |
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| Here are the layers as a pdf file. Zooming in is generally helpful. | Area of the original card the board will cover. C2 needs to be removed (if fitted). |
| 3D View of Card Bottom | 3D View of Card Top |
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| Actual PCBs (without screen printing) | |
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