Tiny url http://tinyurl.com/jdp3qqr
Introduction
The Z88 Flash/RAM card has been working for several years now. When OZ 4.6 was introduced, allowing applications to be run in RAM, some games failed to run.
This was found to be due to an intermittent timing error from the decode chip CD74HCT139 which switches between the RAM and Flash chip.
Although this is one of the fastest decode chips, taking 10nS, the software speed improvements pushed it outside these limits.
This documents highlights the steps taken to rectify this. The detail of the steps taken are now in subsections allowing the reader to go into detail if required.
Object
The object of this exercise is to see if by redefining the design on a small PCB, with the same footprint of the existing decode chip, a faster decode could be achieved by
- Using high speed NAND gates, to see if then if that was successful
- Then try using a decode chip from the same family.
- Using the knowledge gained, add the circuit on the card to add the components to make a high speed 74139.
The Z88 only uses one half of the dual functionality of the full chip.
Adding 3 more of these decode chips allow full functionality using four 3mm wide high speed chips.
See http://www.neuroproductions.be/logic-lab/index.php?id=63191 for the ongoing logic in checking that the full chip will work.
NAND Gate Build
Building the circuit on a breadboard externally
5 NAND gates were used to test whether a faster time could be achieved with the Z88.
Results
The latest software was tried again in a standard 512K/512K Flash/RAM Card and Vic could not make the games software go wrong. The prototype board was packed and sent to Mr T who had a failing Z88 and 512K/512K Flash/RAM Card. He confirmed that it was the decoder chip that was causing the fault and suggested that another decoder could be found.
DECODER Chip Build
Using 5 NAND Gates to prove that there is a hardware problem was very useful, but for a production run using a single 2-to-4 Line Decoder chip to replace them is the next step.
This circuit could now be bread-boarded and tested outside the Z88 card case.
The four signal and power lines can be seen connecting the card to the breadboard.
The Games play without crashing.
Printed Circuit Board
2-to-4 Line Decoder
Provisional Layout
Full 74139 Version Build
Tiny url http://tinyurl.com/zf9haly
The decoder chip above works. It replaces 1/4 of the 74139 for the Z88 design.
Choosing the DUAL TWO-INPUT POSITIVE-OR GATE chip
Looking through the data sheets for a Texas Instruments VC1 chip found the following timings:-
Part No | Chip | Manufacture | Speed nS | Package | Price | |||
---|---|---|---|---|---|---|---|---|
Min | Typ | Max | ||||||
1741279 | SN74LVC2G32QDCURQ1 | Ti | <2.5 | SM8 | $ 0.55 | |||
SN74LVC1G139DCUT | Ti / Farnell | <2.5 | VSSOP | £0.404 |
The 2-to-4 Line Decoder display fast times.
Here is the chip that has been chosen:-
|
Full Data Sheet for SN74LVC2G32-Q1 DUAL TWO-INPUT POSITIVE-OR GATE & Timing
This chip provides the logic for the /CE signal.
Circuit Description
There are 2 inputs A and B. The /CE signal enables the chip.
Logic Lab Test v Truth Table
The logic was checked against the Simplified Schematic with thanks to http://www.neuroproductions.be/logic-lab/ for the simulator.
Inputs Enable Select | Outputs | ||||||
---|---|---|---|---|---|---|---|
/CE | A | B | /Y3 | /Y2 | /Y1 | /Y0 | |
00 | 0 | 0 | 0 | 1 | 1 | 1 | 0 |
01 | 0 | 0 | 1 | 1 | 1 | 0 | 1 |
02 | 0 | 1 | 0 | 1 | 0 | 1 | 1 |
03 | 0 | 1 | 1 | 0 | 1 | 1 | 1 |
1 | X | X | 1 | 1 | 1 | 1 |
/CE = 0 | /CE = 1 | |
---|---|---|
00 | ||
01 | ||
02 | ||
03 |
The eight combinations all agree.
http://www.neuroproductions.be/logic-lab/index.php?id=64582
http://www.neuroproductions.be/logic-lab/index.php?id=64583
The simulator file may be used and viewed at
http://www.neuroproductions.be/logic-lab/index.php?id=64758
Circuit Diagram using a 2-to-4 Line Decoder and 2 Dual OR Chips.
2-to-4 Line Decoder
Updated 17/11/2016
All the components required cannot be fitted on a single card. The design has been split onto two cards. The first PCB is just for the Z88.
2-to-4 Line Decoder and 2 Dual OR Chips
If a full 74139 chip is required another PCB with the extra components can be either
- piggy backed (using the DIL connections) to this card if the 16 Pin SOIC footprint is required or
- plugged into a 16 pin DIL socket.
Building the circuit on a breadboard externally
Components required
2 MSOP-8 IC adaptors were obtained in addition to the DUAL TWO-INPUT POSITIVE-OR GATE chips.
This circuit could now be bread-boarded and tested.
This photo needs to be replaced
The four signal and power lines can be seen connecting the card to the breadboard.
This picture needs to be replaced.
The Games play without crashing.
Oscilloscope Readings
(This picture needs replacing)
This produced the signals required.
This trace shows the Flash chip being selected (/CE1) in 3nS.
The RAM (/CE) would be the same timings.
Signals not the same abbreviations as the circuit
The names of the signals on the scope are not all the same as shown in the circuit.
Signal | Scope | Circuit |
---|---|---|
A19 | A19 | A19 |
/CE1 | _CE1 | /CE1 |
/CE0 | _CE | /CE0 |
Printed Circuit Board
2-to-4 Line Decoder
Main points
- Small holes are drilled in the centre of the pads of H1,so that wire links may be used to connect the signals from the 512K/512K card to the PCB.
- The pads of the footprint of the SOT-23-5 have been made longer, to enable easier soldering of the small parts.
- The bottom Left Hand corner of the PCB matches the shape of the 512K/512K Card for easy alignment.
Provisional Layout
The 7 layers
Here are the layers printed on A4 sheets. The board is small, zooming in is generally helpful.
To be done