The decoder chip works. It replaces 1/4 of the 74139 for the Z88 design.
For the full version, adding 2 OR, dual logic gates to the outputs enables the /CE signal to the design.
Choosing the DECODER and DUAL TWO-INPUT POSITIVE-OR
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GATE chips
Looking through the data sheets for a Texas Instruments VC1 chip found the following timings and package details:-
| Part No | Chip | Manufacture/ | Speed nS | Package | Drawing | mm | Price | Min | Typ | Max|||
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| Distributor | Max | Pad Pitch | Pad Width | Length | ||||||||
| 1741279 | SN74LVC2G32QDCURQ1SN74LVC1G139DCTR | Ti | <2.5 | SM8 | DCT | 0.65 | 0.3 | 4.25 | $ 0.5569 | |||
| SN74LVC1G139DCUT Decoder | Ti / Farnell | <2.5 | VSSOP | DCU | 0.5 | 0.25 | 3.20 | £0.404 | ||||
| 1741279 | SN74LVC2G32QDCURQ1 | Ti | <2.5 | SM8 | DCT | 0.65 | 0.3 | 4.25 | $ 0.55 | |||
SN74LVC2G32DCTR OR Gate | Ti / Farnell | <2.5 | SSOP-8 | DCT | 0.65 | 0.30 | 4.25 | £0.377 | ||||
The 2 input positive display or gates fast times.
Here is are the chip chips that has have been chosen:-
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Full Data
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Sheets for SN74LVC1G139DCT and SN74LVC2G32
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This chip provides the logic for the /CE signal.
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Building the circuit on a breadboard externally
Components required
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2 MSOP-8 IC adaptors were 1 SSOP8 IC adaptor was obtained in addition to the DUAL TWO-INPUT POSITIVE-OR GATE chipsGATE chip.
This circuit could now be bread-boarded and tested as a 1/4 139 as the other 3/4 of the chip is the same logic.
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The decoder and NAND gates chips have different footprints.0.5 mm pitch for the decoder and 0.65 mm pitch for the NAND Gates. |
This photo needs to be replaced with one showing the Dual NAND gates.
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| Power Allocation | |
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| top copper | GND |
| inner 1 | GND |
| inner 2 | Vcc |
| bottom | GND |
Things to check
differences between
VSSOP (8)
SM8
SSOP-8
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Provisional Layout
To be updated when completed
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