The decoder chip works. It replaces 1/4 of the 74139 for the Z88 design.
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| Part No | Chip | Manufacture/ | Speed nS | Package | Drawing | mm | Price | ||
|---|---|---|---|---|---|---|---|---|---|
| Distributor | Max | Pad Pitch | Pad Width | Length | |||||
| 1741279 | SN74LVC1G139DCTR | Ti | <2.5 | SM8 | DCT | 0.65 | 0.3 | 4.25 | $ 0.69 |
| SN74LVC1G139DCUT Decoder | Ti / Farnell | <2.5 | VSSOP | DCU | 0.5 | 0.25 | 3.20 | £0.404 | |
| 1741279 | SN74LVC2G32QDCURQ1 | Ti | <2.5 | SM8 | DCT | 0.65 | 0.3 | 4.25 | $ 0.55 |
SN74LVC2G32DCTR OR Gate | Ti / Farnell | <2.5 | SSOP-8 | DCT | 0.65 | 0.30 | 4.25 | £0.377 | |
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All the components required are fitted on a single card.
Testing the Circuit
The 2 to 4 line decoder has been tested using /CE to select the top half of the device. Now the /CE signal needs to be tested using the two NAND gates connected to the output of Y0 and Y1. A1 is connected to GND so that only Y0 and Y1 are used.
2-to-4 Line Decoder and 2 Dual OR Chips
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This photo needs to be replaced with one showing the Decoder and the Dual NAND gates.
The four signal and power lines can be seen connecting the card to the breadboard.
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Signal lines are used on all 4 layers. This is because all eight terminals are used and it is the only way to get the connections out from the middle of the chip. Connecting power to the chips is easier as well using stub connections.
| Power Allocation | |
|---|---|
| top copper | GND |
| inner 1 | GND |
| inner 2 | Vcc |
| bottom | GND |
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