The decoder chip above works. It replaces 1/4 of the 74139 for the Z88 design.
For the full version, adding 2 OR, dual logic gates to the outputs enables the /CE signal to the design.
Choosing the DUAL TWO-INPUT POSITIVE-OR GATE chip
Looking through the data sheets for a Texas Instruments VC1 chip found the following timings:-
| Part No | Chip | Manufacture | Speed nS | Package | Price | |||
|---|---|---|---|---|---|---|---|---|
| Min | Typ | Max | ||||||
| 1741279 | SN74LVC2G32QDCURQ1 | Ti | <2.5 | SM8 | $ 0.55 | |||
| SN74LVC1G139DCUT | Ti / Farnell | <2.5 | VSSOP | £0.404 | ||||
The 2-to-4 Line Decoder display fast times.
Here is the chip that has been chosen:-
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Full Data Sheet for SN74LVC2G32-Q1 DUAL TWO-INPUT POSITIVE-OR GATE & Timing
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This chip provides the logic for the /CE signal.
Circuit Description
There are 2 inputs A and B. The /CE signal enables the chip.
Logic Lab Test v Truth Table
The logic was checked against the Simplified Schematic with thanks to http://www.neuroproductions.be/logic-lab/ for the simulator.
| Inputs Enable Select | Outputs | ||||||
|---|---|---|---|---|---|---|---|
| /CE | A | B | /Y3 | /Y2 | /Y1 | /Y0 | |
| 00 | 0 | 0 | 0 | 1 | 1 | 1 | 0 |
| 01 | 0 | 0 | 1 | 1 | 1 | 0 | 1 |
| 02 | 0 | 1 | 0 | 1 | 0 | 1 | 1 |
| 03 | 0 | 1 | 1 | 0 | 1 | 1 | 1 |
| 1 | X | X | 1 | 1 | 1 | 1 | |
| /CE = 0 | /CE = 1 | |
|---|---|---|
00 |
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01 |
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02 |
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03 |
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The eight combinations all agree.
http://www.neuroproductions.be/logic-lab/index.php?id=64582
http://www.neuroproductions.be/logic-lab/index.php?id=64583
The simulator file may be used and viewed at
http://www.neuroproductions.be/logic-lab/index.php?id=64758
Circuit Diagram using a 2-to-4 Line Decoder and 2 Dual OR Chips.
2-to-4 Line Decoder
Updated 17/11/2016
All the components required cannot be fitted on a single card. The design has been split onto two cards. The first PCB is just for the Z88.
2-to-4 Line Decoder and 2 Dual OR Chips
If a full 74139 chip is required another PCB with the extra components can be either
- piggy backed (using the DIL connections) to this card if the 16 Pin SOIC footprint is required or
- plugged into a 16 pin DIL socket.
Building the circuit on a breadboard externally
Components required
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2 MSOP-8 IC adaptors were obtained in addition to the DUAL TWO-INPUT POSITIVE-OR GATE chips.
This circuit could now be bread-boarded and tested.
This photo needs to be replaced
The four signal and power lines can be seen connecting the card to the breadboard.
This picture needs to be replaced.
The Games play without crashing.
Oscilloscope Readings
(This picture needs replacing)
This produced the signals required.
This trace shows the Flash chip being selected (/CE1) in 3nS.
The RAM (/CE) would be the same timings.
Signals not the same abbreviations as the circuit
The names of the signals on the scope are not all the same as shown in the circuit.
| Signal | Scope | Circuit |
|---|---|---|
| A19 | A19 | A19 |
| /CE1 | _CE1 | /CE1 |
| /CE0 | _CE | /CE0 |
Printed Circuit Board
2-to-4 Line Decoder
Main points
- Small holes are drilled in the centre of the pads of H1,so that wire links may be used to connect the signals from the 512K/512K card to the PCB.
- The pads of the footprint of the SOT-23-5 have been made longer, to enable easier soldering of the small parts.
- The bottom Left Hand corner of the PCB matches the shape of the 512K/512K Card for easy alignment.
Provisional Layout
The 7 layers
Here are the layers printed on A4 sheets. The board is small, zooming in is generally helpful.
To be done