Bit Manipulation Group
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Mnemonic       Symbolic          Flags (bit 7-0)  Instruction       Number     Number of Number of  Comments
              operation         S Z . H . V N C  opcode            of bytes   M cycles   T states
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BIT b,r        Fz <- NOT rb       X ? X 1 X X 0 *  11 001 011 (CBh)   2          2          8          r:
                                                     01 <b> <r>                                             000 C
                                                                                                             001 B
BIT b,(HL)     Fz <- NOT (HL)b    X ? X 1 X X 0 *  11 001 011 (CBh)   2          3          12         010 E
                                                     01 <b> 110                                             011 D
                                                                                                             100 L
BIT b,(IX+d)   Fz <- NOT (IX+d)b  X ? X 1 X X 0 *  11 011 101 (DDh)   4          5          20         101 H
BIT b,(IY+d)   Fz <- NOT (IY+d)b  X ? X 1 X X 0 *  11 111 101 (FDh)   4          5          20         111 A
                                                     11 001 011 (CBh)
                                                     -- <d> ---
                                                     01 <b> 110                                             b:
                                                                                                             000 0
                                                                                                             001 1
SET b,r        rb <- 1            * * X * X * * *  11 001 011 (CBh)   2          2          8          010 2
                                                    11 <b> <r>                                             011 3
                                                                                                             100 4
SET b,(HL)Â Â Â Â Â (HL)b <- 1Â Â Â Â Â Â Â Â Â * * X * X * * *Â Â 11 001 011 (CBh)Â Â Â 2Â Â Â Â Â Â Â Â Â Â 4Â Â Â Â Â Â Â Â Â Â 15Â Â Â Â Â Â Â Â Â 101Â 5
                                                    11 <b> 110                                             110 6
                                                                                                             111 7
SET b,(IX+d)Â Â Â (IX+d)b <- 1Â Â Â Â Â Â Â * * X * X * * *Â Â 11 011 101 (DDh)Â Â Â 4Â Â Â Â Â Â Â Â Â Â 6Â Â Â Â Â Â Â Â Â Â 23
SET b,(IY+d)Â Â Â (IY+d)b <- 1Â Â Â Â Â Â Â * * X * X * * *Â Â 11 111 101 (FDh)Â Â Â 4Â Â Â Â Â Â Â Â Â Â 6Â Â Â Â Â Â Â Â Â Â 23
                                                     11 001 011 (CBh)
                                                     -- <d> ---
                                                    11 <b> 110
RES b,r        rb <- 0            * * X * X * * *  11 001 011 (CBh)   2          2          8
                                                    10 <b> <r>
RES b,(HL)Â Â Â Â Â (HL)b <- 0Â Â Â Â Â Â Â Â Â * * X * X * * *Â Â 11 001 011 (CBh)Â Â Â 2Â Â Â Â Â Â Â Â Â Â 4Â Â Â Â Â Â Â Â Â Â 15
                                                    10 <b> 110
RES b,(IX+d)Â Â Â (IX+d)b <- 0Â Â Â Â Â Â Â * * X * X * * *Â Â 11 011 101 (DDh)Â Â Â 4Â Â Â Â Â Â Â Â Â Â 6Â Â Â Â Â Â Â Â Â Â 23
RES b,(IY+d)Â Â Â (IY+d)b <- 0Â Â Â Â Â Â Â * * X * X * * *Â Â 11 111 101 (FDh)Â Â Â 4Â Â Â Â Â Â Â Â Â Â 6Â Â Â Â Â Â Â Â Â Â 23
                                                     11 001 011 (CBh)
                                                     -- <d> ---
                                                    10 <b> 110
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Please note:
The bit to be tested by the BIT instruction is first inverted before copied to Fz, ie. Fz = 1 if the corresponding bit is zero. Fz = 0 if the corresponding bit is 1.